STMicro Launches Cortex-M4 family – a killer M4?
Before we dive into the details, why is this so important?
With ARM dominating a number of key markets, the search for new opportunities has been on for years and ARM has kept the microcontroller as a prime target, hoping to grasp a greater share of the expected 9 billion units shipping in 2015.
The upper end of the market – e.g. complex motor control and power management, medical, embedded media – requires more digital signal processing than a traditional MCU can handle. The Cortex-M4 builds on the M3 while adding single cycle MAC (Multiplicate and Accumulate, the basis for numerous DSP algorithms), hardware multiply and divide instructions and a few others.
ST have been a little slower than their counterparts to release their Cortex-M4 family. They, for sure, have been busy enjoying a solid 45% market share of Cortex-M based MCU – according to ST and based on ARM Cortex M shipments. Looking at ARM reported shipments of Cortex M based ICs, this translates into close to 250 million units of its STM32F family products shipped as of the end of Q1 2011.
So any move by a heavyweight does matter.
Now, let’s roll back and see the timeline. The ARMv7-M architecture profile was created to address the needs of the microcontroller (MCU) market for the high-performance combined with low power and small size.
Back in 2010 (Feb 22), ARM introduced the Cortex-M4 and announced that ST, NXP and TI had already licensed the core with 2 other semiconductor companies. One of them will happen to be Freescale.
NXP announced their license the same day and demonstrated the first working silicon at ESC Silicon Valley by the end of April last year. Freescale unveiled the Kinetis during their Technology Forum in July of 2010.
A few months later (Nov 30 2010), ST unveiled their M4 plans with little details beyond the sampling date announced sometime for 2011.
Although claims of low power consumption have been made by some players, only TI and FSL have published some level of power consumption information in their respective datasheets.
Nonetheless, with the Keremi Dashboard, we have been able to compare some of the most recent architectures, and in particular some interesting price points.
As you can see in the following picture, ST is positioned in the higher end price bracket with 168MHz, the optional FPU and logic to address latency when accessing the internal Flash memory available in 512/1024 kB. Freescale have positioned themselves in the middle with more moderate prices with a focus on 256/512kB of flash.
NXP have taken a much differentiated approach by packing a Cortex M4 and a Cortex M0 (for administrative tasks) with no Flash in this first batch of devices. Single SPI flash are available broadly at prices around $1 for 256kB to 1024kB and that makes the LPC4/Serial Flash combination very attractive. But bandwidth limitations will hurt the efficiency of any algorithm that needs to access data on the external Flash. Quad SPI are beginning to appear more broadly, (e.g. at Winbond), but it has been difficult to get pricing information so far.
Coming back to our original question, ST currently available Cortex-M4 products are clearly targeted at high performance applications where large code/data and complex algorithms are required. With respect to simpler applications that still do need heavy DSP processing, ST still faces good competition from the usual suspects, FSL, NXP and TI.
As usual, if you have questions, comments or would like to know more about our dashboard, please contact us at email@example.com.
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